1. Field of the Invention
This invention relates to the formation of crystalline silicon oxide barriers for use in semiconductor devices with particular but not sole use in connection with silicon-based resonant tunneling diodes.
2. Brief Description of the Prior Art
Resonant tunneling diodes are typically devices which are built on a semiconductor substrate, generally having (100) crystallographic orientation. The silicon-based diode structure generally includes a thin barrier layer of silicon oxide over the substrate onto which is deposited a layer of silicon. A further barrier layer of silicon oxide is deposited over the silicon layer with a gate electrode, which is a metal of doped polysilicon, formed thereover to complete the diode structure. According to the I-V (current vs. voltage) curve of such diodes), at a low voltage (below about 1 volt) across the diode as shown in FIG. 1 at voltage V.sub.1 in the current flow observed at voltages closely below and closely above voltage V.sub.1, this voltage rapidly tapering off at voltage V.sub.2 and then rising exponentially starting at voltage V.sub.3. This phenomenon occurs because current flow generally does not occur until the current is able to go over the energy barrier of the barrier layer of the tunneling diode. However, if the barrier layer is sufficiently thin, such as from about 2 to about 8 monolayers or from about 6 to about 25 Angstroms (this distance depending upon the barrier layer molecules involved), then electrons can tunnel through the barrier. Furthermore, if the silicon well is sufficiently thin, i.e. from about 2 to about 8 monolayers and preferably about 5 monolayers or about 15 Angstroms, quantum levels are set up within the quantum well. Accordingly, if the voltage is tuned properly, the electron energy will align with one of the quantum states and travel through the quantum well as well as the barriers. However, if the voltage is such that the electron energy is not aligned with a quantum state (e.g. &lt;V.sub.1 volts) and has no quantum state in which to tunnel, the current flow drops until the energy level is sufficient to go over the barrier or until a higher quantum state, if present, has been reached. This explains the sudden peak in current flow at about V.sub.1 volts as discussed above and shown in FIG. 1. It follows that with sufficiently thin layers, tunneling is obtained to provide high current flow with low voltage levels. This is an important attribute in view of the present direction of the art toward the use of lower voltage components.
A key to the operation described above is that the well must by crystalline. This has not presented a problem in the prior art devices which are based upon group III-V compounds, such as gallium arsenide, because, for example, an epitaxially deposited aluminum gallium arsenide insulator layer can be formed over, for example, crystalline gallium arsenide. Crystalline gallium arsenide is a semiconductor with sufficiently close crystallographic lattice structure match to the aluminum gallium arsenide insulator such that the deposited insulator is also crystalline. This arrangement is not available using a silicon semiconductor well and using prior art techniques. The reason is that, in the fabrication of a silicon-based tunneling device, though starting with a crystalline (100) silicon substrate, the first barrier layer of silicon dioxide formed thereon by standard processing techniques cannot sustain a crystalline silicon layer thereover. Accordingly, the silicon dioxide layer over the crystalline substrate is amorphous, resulting in a silicon well which is also amorphous. It follows that the fabrication of silicon-based resonant tunneling diodes (RTDs) requires a high quality, crystalline quantum well surrounded by ultrathin barriers, which provide a suitable offset in the conduction band from the substrate and insulating barriers. Many materials can provide a large conduction band offset, however most of these materials yield a poor quality silicon quantum well. The ability to grow epitaxial, silicon lattice-matched insulators directly on silicon would allow fabrication of high quality silicon quantum wells for RTD and other applications.